Title :
Improved scatterometry time to solution for leading-edge logic applications
Author :
Vaid, Alok ; Sendelbach, Matthew ; Komarov, Serguei ; Dziura, Ted ; Ferns, Jason ; Madsen, Jon
Author_Institution :
GLOBALFOUNDRIES, Inc., Hopewell Junction, NY, USA
Abstract :
This paper describes an innovative approach to scatterometry modeling, significantly reducing time to solution compared to the industry´s current best practices. One of the drawbacks to traditional scatterometry measurement techniques is the time required to optimize the model, which includes material optical constant extraction, model build time, initial model optimization, and model testing. A novel methodology that includes both stability and self-consistent scatterometry accuracy prediction can achieve an order of magnitude gain in productivity over prior methods. This technique creates opportunities among semiconductor chip manufacturers for wider scatterometry adoption at advanced technology nodes, where scatterometry is often the only reliable non-destructive metrology for device structure dimensions. The reductions in cycle time and improvements in accuracy prediction are keys to the success of scatterometry as an enabler for advanced process control and monitoring. This paper presents results on a conventional poly gate litho and final inspection and on leading-edge high-k metal gate after-etch applications. Spectroscopic ellipsometry is used to collect spectra from the gratings on the wafers. Then scatterometry results are obtained using the new approach and via traditional industry-accepted procedures to compare time to solution. To confirm the validity of the results, reference metrology data are collected on a CDSEM and TEM and the total measurement uncertainty is evaluated.
Keywords :
ellipsometry; productivity; semiconductor device manufacture; semiconductor device measurement; semiconductor device reliability; semiconductor device testing; sputter etching; cycle time reduction; device structure dimension; inspection; leading-edge high-k metal gate after-etch application; leading-edge logic application; material optical constant extraction; model build time; model optimization; model testing; poly gate litho; productivity; reliable nondestructive metrology; scatterometry measurement; scatterometry modeling; scatterometry time to solution; self-consistent scatterometry accuracy prediction; semiconductor chip manufacturer; spectroscopic ellipsometry; stability; wafer gratings; Accuracy; Logic gates; Metals; Optimization; Predictive models; Radar measurements; Semiconductor device modeling;
Conference_Titel :
Advanced Semiconductor Manufacturing Conference (ASMC), 2010 IEEE/SEMI
Conference_Location :
San Francisco, CA
Print_ISBN :
978-1-4244-6517-0
DOI :
10.1109/ASMC.2010.5551476