DocumentCode :
1616322
Title :
Power comparison between high-speed electrical and optical interconnects for inter-chip communication
Author :
Cho, Hoyeol ; Kapur, Pawan ; Saraswat, Krishna C.
Author_Institution :
Center of Integrated Syst., Stanford Univ., CA, USA
fYear :
2004
Firstpage :
116
Lastpage :
118
Abstract :
Power dissipation between electrical and optical interconnects for high-speed inter-chip communication is compared. A power minimization strategy for optical interconnects is developed and its scaling trends are shown. Optical interconnect when compared with the state-of-the-art electrical interconnect yields lower power beyond a critical length (43cm at 6Gb/s and 100nm technology node). The critical length is fully characterized as a function of system requirements (bit rate and bit-error rate) and interconnect´s end-device parameters (detector capacitance, receiver sensitivity and offset). Higher bit rates yield lower critical lengths making optical interconnects more favorable in the future.
Keywords :
integrated circuit interconnections; optical interconnections; 100 nm; 43 cm; 6 Gbit/s; bit rate; bit-error rate; critical length; detector capacitance; electrical interconnects; high-speed inter-chip communication; interconnect end-device parameters; offset; optical interconnects; power dissipation; power minimization strategy; receiver sensitivity; Bit error rate; High speed optical techniques; Optical buffering; Optical feedback; Optical interconnections; Optical modulation; Optical receivers; Optical transmitters; Power dissipation; Power system interconnection;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Interconnect Technology Conference, 2004. Proceedings of the IEEE 2004 International
Print_ISBN :
0-7803-8308-7
Type :
conf
DOI :
10.1109/IITC.2004.1345710
Filename :
1345710
Link To Document :
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