Title :
Panel: hierarchical and incremental verification for system level design: challenges and accomplishments
Author :
Martin, Grant ; Shukla, Sandeep
Author_Institution :
Cadence Berkeley Labs
Keywords :
Automatic test pattern generation; Automatic testing; Formal specifications; Formal verification; Hardware; Investments; Protocols; System testing; System-level design; Test pattern generators;
Conference_Titel :
Formal Methods and Models for Co-Design, 2003. MEMOCODE '03. Proceedings. First ACM and IEEE International Conference on
Conference_Location :
Mont Saint Michel, France
Print_ISBN :
0-7695-1923-7
DOI :
10.1109/MEMCOD.2003.1210094
