Trends in low-voltage embedded-RAM technology

Author

Itoh, Kiyoo

Author_Institution

Central Res. Lab., Hitachi Ltd., Tokyo, Japan

Volume

2

fYear

2002

fDate

6/24/1905 12:00:00 AM

Firstpage

497

Lastpage

501

Abstract

First, trends in the gate-oxide thickness of MOSFET for DRAM and MPU are discussed to clarify the strong need for low-voltage operation of embedded RAMs. Then, modern peripheral logic circuits for reducing leakage currents, and DRAM/SRAM cells to cope with the ever-decreasing signal charges are described. Finally, needs for developments of subthreshold-current reduction circuits for use in active mode, memory-rich SoC architectures, and gain cells and non-volatile cells are emphasized

Keywords

DRAM chips; MOS digital integrated circuits; application specific integrated circuits; cellular arrays; integrated circuit design; leakage currents; low-power electronics; memory architecture; DRAM/SRAM cells; MOSFET; active mode; gain cells; gate-oxide thickness; leakage currents; low-voltage embedded-RAM technology; memory-rich SoC architectures; nonvolatile cells; peripheral logic circuits; signal charges; subthreshold-current reduction circuits; Energy management; Leakage current; Logic circuits; MOSFET circuits; Memory architecture; Nonvolatile memory; Power supplies; Random access memory; System-on-a-chip; Tunneling;

fLanguage

English

Publisher

ieee

Conference_Titel

Microelectronics, 2002. MIEL 2002. 23rd International Conference on

Conference_Location

Nis

Print_ISBN

0-7803-7235-2

Type

conf

DOI

10.1109/MIEL.2002.1003306

Filename

1003306