Investigating MLC variation of filamentary and non-filamentary RRAM

Author

Jen-Chieh Liu ; I-Ting Wang ; Chung-Wei Hsu ; Wun-Cheng Luo ; Tuo-Hung Hou

Author_Institution

Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan

fYear

2014

fDate

28-30 April 2014

Firstpage

1

Lastpage

2

Abstract

Distinct statistical differences between the HBM non-filamentary RRAM and popular filamentary RRAM are highlighted in this study. The HBM RRAM features little cycle-to-cycle variation on both resistance and SET/RESET time, which enlarges the design window of MLC operation. A reliable four-level MLC operation have been demonstrated in the HBM device, suggesting its great potential for high-density data storage applications.

Keywords

integrated circuit design; integrated circuit reliability; random-access storage; HBM RRAM; MLC operation design window; MLC variation; cycle-to-cycle variation; filamentary RRAM; filamentary resistive RAM technology; high-density data storage applications; homogeneous barrier modulation mechanism; multiple-level-per-cell; nonfilamentary RRAM; reliable four-level MLC operation; set-reset time; Electronic countermeasures; Modulation; Resistance; Stress; Switches; Voltage control; Voltage measurement;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Technology, Systems and Application (VLSI-TSA), Proceedings of Technical Program - 2014 International Symposium on

Conference_Location

Hsinchu

Type

conf

DOI

10.1109/VLSI-TSA.2014.6839684

Filename

6839684