Title :
IC implementation of a current-mode chaotic neuron
Author :
Herrera, Ruben ; Suyama, Ken ; Horio, Yoshihiko
Author_Institution :
Microelectron. Circuits & Syst. Lab., Columbia Univ., New York, NY, USA
Abstract :
An IC implementation of a new current-mode chaotic neuron is presented. The circuit mainly consists of CMOS inverters, which are used as transconductance amplifiers and nonlinear elements. The chip was fabricated using 1.2 μm HP CMOS process. One neuron occupies only 0.0076 mm2 which is smaller than a standard bonding pad. The circuit was tested at a clock frequency of 2 MHz
Keywords :
CMOS analogue integrated circuits; analogue processing circuits; chaos; neural chips; 1.2 micron; 2 MHz; CMOS inverters; HP CMOS process; IC implementation; current-mode chaotic neuron; nonlinear elements; transconductance amplifiers; Chaos; Circuit testing; Clocks; Hopfield neural networks; Inverters; Neural networks; Neurons; Semiconductor device modeling; Transconductance; Voltage;
Conference_Titel :
Circuits and Systems, 1998. ISCAS '98. Proceedings of the 1998 IEEE International Symposium on
Conference_Location :
Monterey, CA
Print_ISBN :
0-7803-4455-3
DOI :
10.1109/ISCAS.1998.704070
