Influence of under-bump metallurgy and solder alloys on the crack in the wafer level chip scale packaging

Author

Lu, Julia Hsin-Lin ; Xu, Mengdi ; Zhang, Haijun ; Lu, H.L. ; Zhang, David Wei

Author_Institution

Dept. of Opt. Sci. & Eng., Fudan Univ., Shanghai, China

fYear

2012

Firstpage

1

Lastpage

3

Abstract

The finite element method (FEM) is employed to investigate the solder crack mechanism in wafer level chip scale packaging (WLCSP). The location of the initial crack is calculated and is compared to the experimental one. Moreover, the impact of the following three aspects, e.g. under-bump metallurgy (UBM) materials, solder alloy, and the thickness of the UBM layers on the initial crack growth in solder is investigated by calculating J-integral, respectively, which reflects the possibility of crack growth. It is concluded that the J-integral values in 96.5Sn3.5Ag solder and the Au-Ni-Cu-Ti UBM material are smaller than other cases.

Keywords

copper alloys; cracks; finite element analysis; gold alloys; nickel alloys; silver alloys; soldering; tin alloys; titanium alloys; wafer level packaging; Au-Ni-Cu-Ti; J-integral; Sn-Ag; UBM material; crack growth; finite element method; solder alloy; solder crack mechanism; under bump metallurgy; wafer level chip scale packaging; Finite element analysis; Gold; Materials; Nickel; Strain; Stress; Crack growth; FEM; UBM; WLCSP;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices and Solid State Circuit (EDSSC), 2012 IEEE International Conference on

Conference_Location

Bangkok

Print_ISBN

978-1-4673-5694-7

Type

conf

DOI

10.1109/EDSSC.2012.6482769

Filename

6482769