FSM non-minimal state encoding for low power

In this paper, we focus our attention on the problem of FSM state encoding for low power. In contrast to many publications where probabilistic approach to power estimation is offered, we consider power measurement based on given user-specified input sequence. Although the power dissipation depends on several parameters (register and output switching activity, complexity of combinational part, capacitance load on the gate), switching is the most important source of power dissipation. Our goal is to develop an encoding procedure which minimizes register switching activity. We start with a highly redundant (seed) encoding and minimize its length while minimizing the register switching activity. Unlike previous works, we don´t restrict encoding final length (only register switching activity is considered). Therefore, final encoding length may differ from the minimal one. We tested our encoding procedure on several benchmarks from the MCNC set. The experiments show that in many cases, power dissipation obtained using our encoding (generally, of non-minimal length) is less than one achieved when encoding of minimal length is generated