DocumentCode
1617927
Title
A sub-1V bandgap voltage reference in 32nm FinFET technology
Author
Annema, A.J. ; Veldhorst, P. ; Doornbos, G. ; Nauta, B.
Author_Institution
Univ. of Twente, Enschede
fYear
2009
Firstpage
332
Lastpage
333
Abstract
The bulk CMOS technology is expected to scale down to about 32 nm node and likely the successor would be the FinFET. The FinFET is an ultra-thin body multi-gate MOS transistor with among other characteristics a much higher voltage gain compared to a conventional bulk MOS transistor. Bandgap reference circuits cannot be directly ported from bulk CMOS technologies to SOI FinFET technologies, because both conventional diodes cannot be realized in thin SOI layers and also, area-efficient resistors are not readily available in processes with only metal(lic) gates. In this paper, a sub-1 V bandgap reference circuit is implemented in a 32 nm SOI FinFET technology, with an architecture that significantly reduces the required total resistance value.
Keywords
MOSFET; nanoelectronics; reference circuits; silicon-on-insulator; SOI FinFET technology; Si-JkJk; bandgap voltage reference circuits; bulk CMOS technology; size 32 nm; thin SOI layers; ultra-thin body multigate MOS transistor; CMOS process; CMOS technology; Circuits; Diodes; FinFETs; Immune system; MOSFETs; Photonic band gap; Resistors; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference - Digest of Technical Papers, 2009. ISSCC 2009. IEEE International
Conference_Location
San Francisco, CA
Print_ISBN
978-1-4244-3458-9
Type
conf
DOI
10.1109/ISSCC.2009.4977443
Filename
4977443
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