Title :
A High-Accuracy Design of Frequency Divider with FPGA and ASIC Implementation
Author :
Ligang Hou ; Tianran Zhang ; Jinhui Wang ; Yanqing Li
Author_Institution :
VLSI &Syst. Lab., Beijing Univ. of Technol., Beijing, China
Abstract :
This paper proposes a new algorithm to realize the decimal frequency divider with any number divide ratio. In the statistical periods, the divide ratio is adjusted dynamically by calculating the error of clock. Error of divider can be reduced, and the accuracy has come to 2.3E-11% after 4 rounds. The implementation of decimal frequency divider was realized with FPGA and ASIC. The article analyzed the resource and performance and compared the result of 180nm and 90nm technology on the ASIC. The layout of the circuit was realized on 180nm technology. The experimental result indicated that the decimal frequency divider takes fewer resources, and its performance is steady and reliable.
Keywords :
application specific integrated circuits; field programmable gate arrays; frequency dividers; ASIC; FPGA; circuit layout; decimal frequency divider; high-accuracy design; number divide ratio; size 180 nm; size 90 nm; statistical periods; Industrial control; ASIC; Synthesize; decimal frequency divider; error of clock; layout;
Conference_Titel :
Industrial Control and Electronics Engineering (ICICEE), 2012 International Conference on
Conference_Location :
Xi´an
Print_ISBN :
978-1-4673-1450-3
DOI :
10.1109/ICICEE.2012.437
