• DocumentCode
    1618403
  • Title

    TCAD and SPICE modeling help solve ESD protection issues in analog CMOS technology

  • Author

    Trémouilles, D. ; Bertrand, G. ; Bafleur, M. ; Beaudoin, F. ; Perdu, P. ; Lescouzères, L.

  • Author_Institution
    ON Semicond., Toulouse, France
  • Volume
    2
  • fYear
    2002
  • fDate
    6/24/1905 12:00:00 AM
  • Firstpage
    749
  • Abstract
    The number of circuit design iterations due to electrostatic discharge (ESD) failures increases with the complexity of VLSI technologies and the shrinkage of their dimensions. In this paper, we show how TCAD and ESD SPICE modeling can be used to solve ESD protection issues in an analog CMOS technology.
  • Keywords
    CMOS analogue integrated circuits; SPICE; circuit CAD; electrostatic discharge; integrated circuit design; integrated circuit modelling; protection; technology CAD (electronics); ESD protection; IC design rules; SPICE modeling; TCAD; VLSI technology complexity; analog CMOS technology; circuit design iterations; electrostatic discharge failures; CMOS technology; Circuits; Design methodology; Electrostatic discharge; MOS devices; Protection; SPICE; Semiconductor device modeling; Stress; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Microelectronics, 2002. MIEL 2002. 23rd International Conference on
  • Print_ISBN
    0-7803-7235-2
  • Type

    conf

  • DOI
    10.1109/MIEL.2002.1003366
  • Filename
    1003366
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1618403