An MOS test device with the gate electrode emphasized for dielectric breakdown

Author

Tatewaki, Youichi ; Matsuda, Kenzou ; Tanaka, Kenichi ; Nishizawa, Kazuhira ; Sakiyama, Keizou

Author_Institution

Sharp Corp., Nara, Japan

fYear

1990

Firstpage

47

Lastpage

49

Abstract

A novel test device was fabricated with two MOS structures. The dielectric of the test device has a differential thickness and area which are combined with the same gate electrode. After the two MOS devices were fabricated on the same wafer, they were processed by ion implantation and sputtering. From the results of the measured electrical properties, it was possible to confirm that the dielectric breakdown caused by electrostatic charge-up is affected by an electron shower current in the ion implantation and the RF power in the sputtering. As a result, it was possible to find the effective process conditions for preventing charge-up. Test devices were fabricated that are 20 times more sensitive to dielectric breakdown than conventional MOS devices

Keywords

electric breakdown of solids; ion implantation; metal-insulator-semiconductor devices; sputtering; MOS test device; RF power; dielectric breakdown; differential thickness; effective process conditions; electron shower current; electrostatic charge-up; gate electrode; ion implantation; sputtering; Current measurement; Dielectric breakdown; Dielectric devices; Dielectric measurements; Electrodes; Electrostatic measurements; Ion implantation; MOS devices; Sputtering; Testing;

fLanguage

English

Publisher

ieee

Conference_Titel

Microelectronic Test Structures, 1991. ICMTS 1991. Proceedings of the 1991 International Conference on

Conference_Location

Kyoto

Print_ISBN

0-87942-588-1

Type

conf

DOI

10.1109/ICMTS.1990.161711

Filename

161711