Histogram-based distortion and gain tracking testing of an 8-bit PCM mixed analog-digital IC chip

The effective number of bits of a linear analog-to-digital converter (ADC) can be computed using the code density histogram method. The technique is adapted to test an oversampling or sigma-delta (ΣΔ) converter. It is assumed that the device under test includes a ΣΔ modulator, a decimator, and a μ-law compressor. The analog stimulus to the device under test is supplied by a precision signal generator, and the code density histogram of the 8-b μ-law compressed output of the ADC is analyzed to determine whether the converter is performing within its specifications. Simulation results which were obtained using a very simple model for the ADC and additive white Gaussian noise are presented