• DocumentCode
    1619305
  • Title

    Hardware validated TCAD simulation of polysilicon resistor including trap physics and self-heating

  • Author

    Adari, R.B.R. ; Suresh, Smitha ; Prabhu, R.D.

  • Author_Institution
    Dept. of Electr. Eng., Indian Inst. of Technol. Bombay, Mumbai, India
  • fYear
    2012
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    Heavily doped poly silicon materials are very important in electronic applications as resistors, interconnects, gate electrodes etc. When used as serpentine resistors in analog applications (say in a switch) the possibility of `mutual´ self heating between the fingers leading to reliability concerns is quite significant. This inspires a need to examine the self-heating effects in detail. The electrical transport properties of polysilicon are different compared to single crystal silicon due to the existence of grains and grain boundaries. A TCAD model, for a heavily doped poly silicon resistor, incorporating self-heating and the grain boundary model with the well known double exponential trap energy distribution is presented. The TCAD results are in excellent aggrement with the corresponding hardware measurements of resistance versus voltage as well as the measured Temperature Coefficient of Resistance (TCR). This work highlights the importance of self-heating for an accurate description of device electrothermal behavior. The effect of trap energy density on TCR has been discussed in detail. Both doping dependent mobility and phonon scattering mobility models are considered during the simulations. Our study lends support to the idea that for a given doping concentration, by controlling the grain growth process in polysilicon it may be possible to tailormake a positive or negative TCR poly resistor.
  • Keywords
    resistors; semiconductor doping; technology CAD (electronics); TCR; electrical transport properties; electronic applications; hardware validated TCAD simulation; heavily doped poly silicon materials; polysilicon resistor; self-heating; serpentine resistors; temperature coefficient of resistance; trap physics; Electrical resistance measurement; Grain boundaries; Resistance; Resistors; Semiconductor process modeling; Silicon; Temperature measurement; Double exponential trap distribution; Polysilicon resistor; grain boundary; self heating; temperature coefficient of resisrance;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electron Devices and Solid State Circuit (EDSSC), 2012 IEEE International Conference on
  • Conference_Location
    Bangkok
  • Print_ISBN
    978-1-4673-5694-7
  • Type

    conf

  • DOI
    10.1109/EDSSC.2012.6482841
  • Filename
    6482841