Title :
Electromigration-induced failure analysis of VLSI interconnection components
Author :
Goel, A.K. ; Leipnitz, M.M.
Author_Institution :
Dept. of Electr. Eng., Michigan Technol. Univ., Houghton, MI, USA
Abstract :
An analysis of electromigration-induced failure effects in various VLSI interconnection components is conducted using the series model of the failure mechanism. The components include a straight segment, a bend, a step, a via, a multisection interconnection and a power/ground bus. By considering the effects of the average flux density and the bamboo phenomenon on the grain boundary migration, each interconnection component is reduced into a series-parallel combination of straight segments. For each of the above-mentioned components, the dependence of the median-time-to-failure and the lognormal standard deviation of the corresponding failure distribution on the various component parameters is investigated. Results can be used for minimizing the interconnection failure due to electromigration
Keywords :
VLSI; circuit reliability; electromigration; failure analysis; integrated circuit technology; metallisation; MTTF; VLSI; average flux density; bamboo phenomenon; bend; electromigration-induced failure effects; failure analysis; failure distribution; grain boundary migration; interconnection components; median-time-to-failure; monolithic IC; multisection; power/ground bus; series model; step; straight segment; via; Electromigration; Failure analysis; Grain boundaries; Integrated circuit interconnections; Logic gates; Plugs; TV; Temperature; Very large scale integration; Voltage;
Conference_Titel :
Circuits and Systems, 1992., Proceedings of the 35th Midwest Symposium on
Conference_Location :
Washington, DC
Print_ISBN :
0-7803-0510-8
DOI :
10.1109/MWSCAS.1992.271243
