Title :
A 14-b 2.5 MSPS pipelined ADC with on chip EPROM
Author :
Mercer, Douglas A.
Author_Institution :
Analog Devices Semicond, Wilmington, MA, USA
Abstract :
A 14-b 2.5-MSPS, multi-stage pipeline, subranging analog-to-digital converter is presented. In addition to conventional laser-wafer-trim, on chip, “write once” EPROM is used to calibrate inter-stage gain errors at package sort. Integral nonlinearity errors as small as +/- 2LSB, and differential nonlinearity errors of -0.6, +0.8 LSB have been achieved. The 5.4 mm by 4.4 mm device includes a 2.5-V reference is built on a 2-μm 10-V BiCMOS process and consumes 550 mW of power
Keywords :
EPROM; 10 V; 14 bit; 14-b 2.5 MSPS; 2 micron; 2.5 V; 550 mW; BiCMOS process; MSPS pipelined ADC; inter-stage gain errors calibration; multi-stage pipeline; onchip EPROM; pipelined ADC with on chip EPROM; subranging analog-to-digital converter; BiCMOS integrated circuits; Calibration; Capacitors; Circuit noise; Dynamic range; EPROM; Linearity; Packaging; Pipelines; Power supplies;
Conference_Titel :
Bipolar/BiCMOS Circuits and Technology Meeting,1994., Proceedings of the 1994
Conference_Location :
Minneapolis, MN
Print_ISBN :
0-7803-1316-X
DOI :
10.1109/BIPOL.1994.587844
