High voltage dual-gate turn-off thyristors

The quest of the last ten years for high power snubberless semiconductor switches has resulted in IGCTs (integrated gate-commutated thyristors) and IGBTs (insulated-gate bipolar transistors) currently available up to 6 kV. Both devices have inherently short switching times but are nevertheless frequency limited by their switching losses. 10 kV IGCTs have been shown to be useable up to about 5.5 kV/sub DC/ and 400 Hz. However market needs for PWM (pulse width modulation) at about 1 kHz cannot be satisfied above 3 kV DC, due to the inherent turn-off losses of the aforementioned bipolar components. The fundamental barrier presented by the charge stored in the n-base of IGBTs and IGCTs must be reduced at turn-off without increasing conduction losses. The use of a second, anode-side gate (n-gate) to reduce the high plasma density at turn-off has already been described for conventional snubbered GTOs but the technique has not yet been applied to a snubberless device such as the IGCT. This paper shows the turn-off loss reductions which can be obtained by "grafting" a second gate to the conventional IGCT and compares these results to those of a new type designed specifically for "gate-assisted turn-off".