DocumentCode
1619812
Title
Data compression of a +1, -1 and 0 representation
Author
Noonan, Joseph P. ; Semeter, Patricia Mills
Author_Institution
Tufts Univ., Medford, MA, USA
fYear
1989
Firstpage
304
Abstract
A data compression algorithm designed to reduce the storage requirements of a +1, -1, and 0 signal representation is proposed. The signal representation results from a fast and simple algorithm. An overview of the signal generation and compression system and details of the new compaction algorithm are presented. The results are compared to those of an existing compression technique
Keywords
data compression; compaction algorithm; data compression algorithm; signal generation; signal representation; storage requirements reduction; Algorithm design and analysis; Compression algorithms; Data compression; Decoding; Displays; Encoding; Finite impulse response filter; Frequency response; Signal processing algorithms; Signal representations;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1989., IEEE International Symposium on
Conference_Location
Portland, OR
Type
conf
DOI
10.1109/ISCAS.1989.100351
Filename
100351
Link To Document