Title : 
The design of low power 11.6mW high speed 1.8Gb/s stand-alone LVDS driver in 0.18-µm CMOS
         
        
        
            Author_Institution : 
Dept. of Meas. & Instrum., AGH Univ. of Sci. & Technol., Cracow, Poland
         
        
        
        
        
            Abstract : 
This paper presents a design of power efficient and high speed transmitter implemented in CMOS 180 nm UMC technology, fully compatible with low voltage differential signaling (LVDS) standard specified by IEEE. The main stand-alone driver´s functional blocks: LVDS core, common mode feedback (CMFB), control buffer and band-gap reference source are described in detail. Three architectures of LVDS transmitter cores: bridged-switched current source (BSCS), double current source (DCS) and open drain (OD) are compared and finally the BSCS architecture is selected due to project´s requirements. The designed LVDS driver characterizes a very low level of static and dynamic power dissipation, Pstat = 7.5 mW and Pdyn = 11.6 mW respectively, at data speed transmission 1.8Gb/s with receiver´s input capacitance CR = 1 pF and Pdyn = 8.5 mW, data rates equals 400 Mb/s at CR = 5 pF.
         
        
            Keywords : 
CMOS integrated circuits; driver circuits; integrated circuit design; low-power electronics; transmitters; BSCS architecture; CMOS UMC technology; LVDS transmitter cores; band-gap reference source; bit rate 1.8 Gbit/s; bit rate 400 Mbit/s; bridged-switched current source; capacitance 1 pF; capacitance 5 pF; common mode feedback; control buffer; data speed transmission; double current source; dynamic power dissipation; high speed transmitter; low power high speed stand-alone LVDS driver; low voltage differential signaling standard; open drain; power 11.6 mW; power 7.5 mW; power 8.5 mW; receiver input capacitance; size 0.18 mum; stand-alone driver functional blocks; static power dissipation; CMOS integrated circuits; CMOS technology; Chromium; Driver circuits; Photonic band gap; Receivers; Resistors; ASIC; LVDS; high speed data communication; input/output (I/O) drivers; low power design;
         
        
        
        
            Conference_Titel : 
Mixed Design of Integrated Circuits and Systems (MIXDES), 2010 Proceedings of the 17th International Conference
         
        
            Conference_Location : 
Warsaw
         
        
            Print_ISBN : 
978-1-4244-7011-2
         
        
            Electronic_ISBN : 
978-83-928756-4-2