DocumentCode
1620226
Title
A 1.3-ns 32-word by 32-bit three-port BiCMOS register file
Author
Chao, Chin-Chieh ; Wooley, Bruce A.
Author_Institution
Center for Integrated Syst., Stanford Univ., CA, USA
fYear
1994
Firstpage
91
Lastpage
94
Abstract
This paper describes a CMOS multiport static memory cell that can be accessed through a low-voltage-swing read path. With this cell it is possible to achieve read access times comparable to those of pure bipolar memories while preserving the high density of CMOS memories. An experimental 32-word by 32-bit three-port register file has been designed and implemented using the cell. This circuit was fabricated in a 0.6-μm BiCMOS technology and achieves a pin-to-pin access time of 1.3 ns at 20°C
Keywords
multiport networks; 0.6 micron; 1.3 ns; 20 degC; 32 bit; VLSI; low-voltage-swing read path; memory density; multiport static memory cell; pin-to-pin access time; read access times; three-port BiCMOS register file; BiCMOS integrated circuits; CMOS memory circuits; CMOS technology; Chaos; Integrated circuit technology; Multichip modules; Packaging; Power dissipation; Registers; Throughput;
fLanguage
English
Publisher
ieee
Conference_Titel
Bipolar/BiCMOS Circuits and Technology Meeting,1994., Proceedings of the 1994
Conference_Location
Minneapolis, MN
Print_ISBN
0-7803-1316-X
Type
conf
DOI
10.1109/BIPOL.1994.587868
Filename
587868
Link To Document