Simple evaluation of very low currents in process characterization

Author

Girard, P. ; Nouet, P. ; Roche, F.M.

Author_Institution

Lab. d´´Autom. et de Microelectron., Montpellier II Univ., France

fYear

1990

Firstpage

93

Lastpage

95

Abstract

A test structure dedicated to the evaluation of very low currents for MOS process characterization is presented. The device consists of an amplifier plus a bias voltage set implemented on the chip and connected to the leaky element. The principle is given, and SPICE simulations, based on 2-μm CMOS industrial technology, show the structure response. Owing to this structure, a strong current amplification is obtained. Consequently, only a classical transistor parameter analyzer is required to evaluate currents in the fA range

Keywords

CMOS integrated circuits; digital simulation; electric current measurement; integrated circuit testing; 2 micron; CMOS industrial technology; MOS process; SPICE simulations; amplifier; bias voltage set; current amplification; electric current; leaky element; process characterization; test structure; transistor parameter analyzer; CMOS technology; Capacitance; Current measurement; DC generators; MOS capacitors; MOSFETs; Scanning electron microscopy; Semiconductor device measurement; Testing; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Microelectronic Test Structures, 1991. ICMTS 1991. Proceedings of the 1991 International Conference on

Conference_Location

Kyoto

Print_ISBN

0-87942-588-1

Type

conf

DOI

10.1109/ICMTS.1990.161719

Filename

161719