Low-complexity architecture design for modified WiMAX Low-Density Parity-Check codes

In this paper, a modified WiMAX Low-Density Parity-Check (LDPC) codes for realistic LDPC coding system architectures is presented. The LDPC code, which is a special class of quasi-cyclic LDPC (QC-LDPC), has an efficient encoding algorithm owing to the simple structure of their parity-check matrices. A proposed distribution of irregular parity-check matrix for the modified WiMAX LDPC is developed so that we can obtain a low-complexity architecture design, and achievable circuit implementation. The modified WiMAX LDPC code decoding employs the iterative min-sum algorithm (MSA) and its decoder architecture design uses the bit node unit (BNU) and check node unit (CNU). Different word-length of hardware design for LDPC decoder can be simulated. Therefore, the word-length with 8-bit is enough for hardware implementation.