Title :
A reconfigurable fault-tolerant system
Author :
Barbour, Ahmed E.
Author_Institution :
Dept. of Math. & Comput. Sci., Georgia Southern Univ., Statesboro, GA, USA
Abstract :
The reconfigurability property of a general form of a majority circuit, which is called two-level error making circuit (2-EMC) is used to build a new dynamic fault-tolerant system. An adaptive voting circuit with provision for online fault detection mechanism is investigated. This new form of a dynamic reconfigurable fault-tolerant system facilitates fault detection and testing procedure of the system. If a fault is detected, the system automatically reconfigures itself so that the faulty unit is isolated and removed from the system and the capability of simultaneous masking of E faulty units is reduced to simultaneous masking of E-1 units. The system can mask up to R-K sequential faults, where R is the degree of redundancy, and K is the grouping parameter of the majority voting circuit, 2-EMC. An alarm signal is provided when critical internal faults in the majority voting circuit are detected. The block design concepts are used to formulate, describe, and construct the general form of the system
Keywords :
fault location; fault tolerant computing; logic circuits; logic testing; redundancy; adaptive voting circuit; alarm signal; dynamic system; grouping parameter; majority circuit; online fault detection mechanism; reconfigurability property; reconfigurable fault-tolerant system; redundancy; reliability; sequential faults; testing procedure; two-level error making circuit; Circuit faults; Electrical fault detection; Electromagnetic compatibility; Fault detection; Fault tolerant systems; Redundancy; Sequential analysis; Switches; System testing; Voting;
Conference_Titel :
Circuits and Systems, 1992., Proceedings of the 35th Midwest Symposium on
Conference_Location :
Washington, DC
Print_ISBN :
0-7803-0510-8
DOI :
10.1109/MWSCAS.1992.271301
