DocumentCode
1620909
Title
CORDIC and SVD implementation in digital hardware
Author
Szecówka, Przemyslaw M. ; Malinowski, Piotr
Author_Institution
Fac. of Microsyst. Electron. & Photonics, Wroclaw Univ. of Technol., Wrocław, Poland
fYear
2010
Firstpage
237
Lastpage
242
Abstract
Singular Value Decomposition is classified among the most effective numeric methods of matrices inversion. The paper presents a study of hardware implementation of SVD and CORDIC algorithms. Various digital architectures were proposed and compared, including low-cost sequential and high-performance pipelined solutions. Fixed point and floating point arithmetic was considered. The concepts were implemented in VHDL, verified and synthesized with Xilinx tools. Selected approach was physically implemented and tested.
Keywords
fixed point arithmetic; floating point arithmetic; hardware description languages; matrix inversion; singular value decomposition; CORDIC algorithms; SVD implementation; VHDL; Xilinx tools; coordinate rotation digital computer; digital hardware; fixed point arithmetic; floating point arithmetic; matrices inversion; singular value decomposition; Clocks; Delay; Hardware; Matrix decomposition; Radiation detectors; Registers; Singular value decomposition; CORDIC; FPGA; SVD; VHDL; digital; hardware;
fLanguage
English
Publisher
ieee
Conference_Titel
Mixed Design of Integrated Circuits and Systems (MIXDES), 2010 Proceedings of the 17th International Conference
Conference_Location
Warsaw
Print_ISBN
978-1-4244-7011-2
Electronic_ISBN
978-83-928756-4-2
Type
conf
Filename
5551655
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