Title :
The inverter matrix: a vehicle for assessing process quality through inverter parameter analysis of variance
Author :
Hannaman, D.J. ; Buehler, M.G. ; Chang, J. ; Sayah, H.R.
Author_Institution :
Silicon Syst., Inc., Tustin, CA, USA
Abstract :
An inverter matrix has been fabricated in 1.6-μm CMOS which allows for a large (≈500) number of inverters to be characterized by a single 2×10 pad array test structure. The variance of the inverter threshold voltage can be expressed as a function of inverter geometry and MOSFET threshold voltages. The standard deviation of the inverter threshold voltage has been observed to be as small as 2.3 mV within a matrix. The inverter matrix is proposed as a standard evaluation circuit for assessing process quality
Keywords :
CMOS integrated circuits; insulated gate field effect transistors; integrated circuit testing; invertors; logic gates; 1.6 micron; 2.3 mV; CMOS; MOSFET threshold voltages; inverter geometry; inverter matrix; inverter parameter analysis; pad array test structure; process quality; standard deviation; standard evaluation circuit; threshold voltage; Analysis of variance; Circuit testing; Decoding; Geometry; Inverters; MOSFET circuits; Particle measurements; Silicon; Threshold voltage; Vehicles;
Conference_Titel :
Microelectronic Test Structures, 1991. ICMTS 1991. Proceedings of the 1991 International Conference on
Conference_Location :
Kyoto
Print_ISBN :
0-87942-588-1
DOI :
10.1109/ICMTS.1990.161722
