DocumentCode
1621109
Title
A 11-bit, 12.5 MHz, low power low voltage continuous-time Sigma-Delta modulator
Author
Di Gioia, Eugenio ; Klar, Heinrich
Author_Institution
Inst. of Microelectron., Tech. Univ. of Berlin, Berlin, Germany
fYear
2010
Firstpage
176
Lastpage
181
Abstract
A 3rd order continuous time (CT) Sigma-Delta modulator with a 14-level flash quantizer is presented, which achieves a resolution of 11.2 bit (ENOB) and a SFDR of 84.6 dB for a signal bandwidth of 12.5 MHz according to transistor level post-layout simulations. The proposed solutions limit the total power consumption to 11.3 mW at a supply voltage of 1.2 V with a UMC 0.13 μm CMOS process.
Keywords
CMOS integrated circuits; low-power electronics; quantisation (signal); sigma-delta modulation; 14-level flash quantizer; 3rd continuous-time sigma-delta modulator; ENOB; SFDR; UMC CMOS process; bandwidth 12.5 GHz; power 11.3 mW; power consumption; size 0.13 mum; transistor level post-layout simulations; voltage 1.2 V; Capacitors; Delay; Modulation; Optical signal processing; Resistors; Resonator filters; Transistors; Continuous-time Sigma-Delta modulator; excess loop delay compensation; low power; resonators;
fLanguage
English
Publisher
ieee
Conference_Titel
Mixed Design of Integrated Circuits and Systems (MIXDES), 2010 Proceedings of the 17th International Conference
Conference_Location
Warsaw
Print_ISBN
978-1-4244-7011-2
Electronic_ISBN
978-83-928756-4-2
Type
conf
Filename
5551665
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