Title :
A parallel S-box architecture for AES byte substitution
Author_Institution :
Dept. of Math. & Comput. Sci., Lethbridge Univ., Alta., Canada
Abstract :
In this paper, a parallel S-box implementation is proposed. The original one S-box look-up table is separated into 32 small S-box look-up tables in order to parallel substitute the byte. By simulation, the average speed up of the proposed parallel byte substitution is 8 times faster than using the previous one S-box look-up table.
Keywords :
cryptography; parallel architectures; table lookup; AES byte substitution; S-box look-up table; cryptography; parallel S-box architecture; parallel S-box implementation; parallel byte substitution; simulation; symmetric block cipher; Clocks; Computational modeling; Computer architecture; Computer science; Cryptography; Galois fields; Inverters; Mathematics; Parallel architectures; Table lookup;
Conference_Titel :
Communications, Circuits and Systems, 2004. ICCCAS 2004. 2004 International Conference on
Conference_Location :
Chengdu
Print_ISBN :
0-7803-8647-7
DOI :
10.1109/ICCCAS.2004.1345925
