A pragmatic, systematic and flexible synthesis for testability methodology

Author

Alves, Vladimir Castro ; Antunes, A. Ribeiro ; Marzouki, Meryem

Author_Institution

COPPE, Univ. Fed. do Rio de Janeiro, Brazil

fYear

1996

Firstpage

263

Lastpage

268

Abstract

Starting from the analysis of the most widely adopted methodologies and the most successful industrial tools in the fields of HLS and DFT, this paper proposes a general framework for a pragmatic, systematic and flexible SFT methodology. The prerequisites for such a methodology, together with the state of the art are first assessed, then an overview of the approach is presented, followed by step-by-step details through a case-study of High-Level Synthesis For BIST. Examples of first obtained results are also provided

Keywords

automatic testing; boundary scan testing; built-in self test; design for testability; high level synthesis; logic testing; AMICAL synthesis; BIST; BUS-based circuit; automatic generation; data path; design for testability; embedded test paths; high-level synthesis for testability; industrial tools; pragmatic synthesis; programmable test pattern generation; scan path; systematic flexible synthesis; testability methodology; Automatic testing; Built-in self-test; Constraint optimization; Control system synthesis; Design for testability; Design optimization; High level synthesis; Libraries; Network synthesis; System testing;

fLanguage

English

Publisher

ieee

Conference_Titel

Test Symposium, 1996., Proceedings of the Fifth Asian

Conference_Location

Hsinchu

ISSN

1085-7735

Print_ISBN

0-8186-7478-4

Type

conf

DOI

10.1109/ATS.1996.555169

Filename

555169