DocumentCode
1621877
Title
Aliasing-free variable gain Delta Sigma Modulator for use in an analog frontend
Author
Mayr, Christian ; Scholze, Stefan ; Ander, Mario ; Henker, Stephan ; Schuffny, Rene
Author_Institution
Neural Circuits & Highly Parallel VLSI Syst., Univ. of Technol. Dresden, Dresden, Germany
fYear
2010
Firstpage
195
Lastpage
199
Abstract
We present an aliasing-free variable gain Delta Sigma Modulator (DSM). The variable gain of the 2-1-1 MASH architecture DSM is carried out by using additional sampling capacitors. This feedforward gain adjustment offers better S2-1-1 MASH architecture DSMNR performance than feedback gain adjustments discussed in the literature, since the internal states of the modulator loop are driven at full signal swing. To eliminate the need for an analog anti-aliasing filter, a decimation filter with a sharp cutoff is employed in the reconstruction of the analog signal. The design is carried out in a 0.6 μm CMOS technology. Measurement & implementation results for the above concepts compare favorably with similar designs in recent literature.
Keywords
CMOS digital integrated circuits; capacitors; delta-sigma modulation; filters; 2-1-1 MASH architecture DSM; CMOS technology; S2-1-1 MASH architecture DSMNR; aliasing-free variable gain delta sigma modulator; analog antialiasing filter; analog frontend; analog signal reconstruction; decimation filter; feedback gain; feedforward gain; full signal swing; modulator loop; sampling capacitors; size 0.6 mum; Capacitance; Electronics packaging; Finite impulse response filter; IIR filters; Modulation; Signal to noise ratio; aliasing filter free Delta Sigma Modulator; preamplifying analog-digital converter; variable gain Delta Sigma Modulator;
fLanguage
English
Publisher
ieee
Conference_Titel
Mixed Design of Integrated Circuits and Systems (MIXDES), 2010 Proceedings of the 17th International Conference
Conference_Location
Warsaw
Print_ISBN
978-1-4244-7011-2
Electronic_ISBN
978-83-928756-4-2
Type
conf
Filename
5551697
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