DocumentCode
1621980
Title
The folded Gilbert cell: a low voltage high performance CMOS multiplier
Author
Ramirez-Angulo, Jaime ; Ming-Shen, Sun
Author_Institution
Dept. of Electr. & Comput. Eng., New Mexico State Univ., Las Cruces, NM, USA
fYear
1992
Firstpage
20
Abstract
Three linearity-improved implementations of a Gilbert cell in CMOS technology are presented. They have low voltage supply requirements and wide input signal ranges on both inputs. Experimental results of a CMOS test chip are presented. The utilization of the cell as a very wide tuning range linear transconductor is discussed
Keywords
CMOS integrated circuits; cellular arrays; multiplying circuits; CMOS multiplier; CMOS technology; folded Gilbert cell; input signal ranges; linear transconductor; linearity-improved implementations; low voltage supply requirements; test chip; Bandwidth; CMOS technology; Circuit testing; Differential amplifiers; Linearity; Low voltage; Operational amplifiers; Power supplies; Signal generators; Transconductance;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1992., Proceedings of the 35th Midwest Symposium on
Conference_Location
Washington, DC
Print_ISBN
0-7803-0510-8
Type
conf
DOI
10.1109/MWSCAS.1992.271344
Filename
271344
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