Wafer bump inspection with transparent film layer using vertical scanning interferometer for semiconductor packaging

With micro-miniaturization and high density integration of semiconductor packages, wafer bump and substrate bump need to be in-line inspected in terms of volume, area and height. A vertical scanning interferometer is proposed for their shape inspection in three dimensions. For wafer bump under transparent film layer, specially-designed information extraction algorithms are suggested, which are composed of top surface and under-layer profile detection algorithm based on interferogram acquired with variations of vertical inspection head position. A series of experiments is performed for verification of the proposed inspection system, and acquired test results are discussed in detail.