• DocumentCode
    1622294
  • Title

    The effect of trench processing conditions on complementary bipolar analog devices with SOI/trench isolation

  • Author

    Jerome, R. ; Post, I. ; Huffstater, K. ; Wodek, G. ; Travnicek, P. ; Williams, D.

  • Author_Institution
    United Technol. Microelectron. Center, Colorado Springs, CO, USA
  • fYear
    1993
  • Firstpage
    41
  • Lastpage
    44
  • Abstract
    Trench processing conditions are optimized for manufacturability of complementary bipolar analog devices and are correlated to transistor Iceo leakage and Vbe matching characteristics. Cross-section SEM analysis, computer simulation, and Raman spectroscopy are used to characterize the stresses related to the SOI/trench/LOCOS structure
  • Keywords
    isolation technology; ACUTE technology; LOCOS; ONO process; Raman spectroscopy; SOI; Si; Si-SiO2; TSUPREM-4 simulation; complementary bipolar analog devices; computer simulation; cross-section SEM; current leakage; hard mask; manufacturability; stresses; trench isolation; trench processing conditions; Complementary circuits/devices;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Bipolar/BiCOMS Circuits and Technology Meeting, 1993., Proceedings of the 1993
  • Conference_Location
    Minneapolis, MN
  • Print_ISBN
    0-7803-1316-X
  • Type

    conf

  • DOI
    10.1109/BIPOL.1993.617464
  • Filename
    617464
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1622294