DocumentCode :
1622485
Title :
Hardware-software bipartitioning for dynamically reconfigurable systems
Author :
Rakhmatov, Daler N. ; Vrudhula, Sarma B K
Author_Institution :
Dept. of Electr. & Comput. Eng., Arizona Univ., Tucson, AZ, USA
fYear :
2002
fDate :
6/24/1905 12:00:00 AM
Firstpage :
145
Lastpage :
150
Abstract :
The main unique feature of dynamically reconfigurable systems is the ability to time-share the same reconfigurable hardware resources. However, the energy-delay cost associated with reconfiguration must be accounted for during hardware-software partitioning. We propose a method for mapping nodes of an application control flow graph either to software or reconfigurable hardware, explicitly targeting minimization of the energy-delay cost due to both computation and configuration. The addressed problems are energy-delay product minimization, delay-constrained energy minimization, and energy-constrained delay minimization. We show how these problems can be tackled by using network flow techniques, after transforming the original control flow graph into an equivalent network. If there are no constraints, as in the case of the energy-delay product minimization, we are able to generate an optimal solution in polynomial time
Keywords :
hardware-software codesign; minimisation; reconfigurable architectures; application control flow graph; delay-constrained energy minimization; dynamically reconfigurable systems; energy-constrained delay minimization; energy-delay cost; hardware-software bipartitioning; reconfigurable hardware; Application software; Communication system software; Costs; Delay; Embedded system; Flow graphs; Hardware; Low power electronics; Minimization methods; Polynomials;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Hardware/Software Codesign, 2002. CODES 2002. Proceedings of the Tenth International Symposium on
Conference_Location :
Estes Park, CO
Print_ISBN :
1-58113-542-4
Type :
conf
DOI :
10.1109/CODES.2002.1003616
Filename :
1003616
Link To Document :
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