Real-time multimedia with C compiler for Hardware

This paper presents C-based design and Dynamic Reconfigurable Chip for real-time data processing such as HD movies, encryption, and face recognition. Even though the performance of CPU, GPU is growing very much, we will have more hardware accelerators in SoC because of the high performance-by-power efficiency. The drawbacks of the hardware accelerators are 1) huge design effort and 2) non programmability. These problems are solved by C-based design and DRP. C-based design, or behavioral synthesis which automatically generates RTL from C, becomes mature and is used for various types of LSI and FPGA of commercial chips. The C description of hardware is easier and more natural than the description for DSP or GPU. The paper explains how C compiler for Hardware and one for software are different, also how C descriptions for hardware and for software are different. Then, it describes how to debug the algorithm which takes weeks for RTL simulation. Next, it discusses how C programs are mapped into DRP. DRP contains dozens or hundreds of context which has hundreds of ALU´s, and if we think the context is very huge sized instruction, DRP can be thought as VLIW processor with un-fixed instruction sets. Advantages and future possibilities with C-based design and DRP will be discussed with some commercial examples.