DocumentCode :
1622556
Title :
High speed low connectivity (HSLC) counter [using cellular automata concept]
Author :
Ahmed, Rabah ; Perreault, David
Author_Institution :
Dept. of Electr. Comput. & Syst. Eng., Boston Univ., MA, USA
fYear :
1992
Firstpage :
433
Abstract :
A new type of nonbinary counter that represents one step toward overcoming the shortcomings of circuit complexity and interconnection delays is introduced. The counter is known as a high speed low connectivity (HSLC) counter. Its architecture employs a cellular logic design concept with judiciously chosen local logical rules for interconnecting its building modules. The realizability of such counters is thoroughly investigated with emphasis on construction rules to achieve the maximum count cycle
Keywords :
cellular automata; counting circuits; logic circuits; shift registers; cellular automata concepts; cellular logic design concept; construction rules; high speed low connectivity counters; local logical rules; maximum count cycle; nonbinary counter; Buildings; Complexity theory; Counting circuits; Delay; Equations; Feedback loop; Integrated circuit interconnections; Resource management; Routing; Systems engineering and theory;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 1992., Proceedings of the 35th Midwest Symposium on
Conference_Location :
Washington, DC
Print_ISBN :
0-7803-0510-8
Type :
conf
DOI :
10.1109/MWSCAS.1992.271370
Filename :
271370
Link To Document :
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