Efficient heuristics for sequential ATPG

Some techniques to heuristically reduce the search-space of a test pattern for sequential automatic test pattern generation (ATPG) circuits are presented. The previous work concerning the implementation of a test generation package is summarized. Then the theoretical concepts on which those techniques are based (observability and controllability recursion) are outlined, together with details concerning how those ideas have been embedded in the main test generation algorithm. The results of the experiments reached by applying the new release of the package on the standard set of benchmark circuits are compared to those obtained running some earlier versions of the same system in order to show the performance improvement