DocumentCode :
1623063
Title :
On the credibility of load-latency measurement of network-on-chips
Author :
Salminen, Erno ; Kulmala, Ari ; Hamalainen, Timo D.
Author_Institution :
Tampere Univ. of Technol., Tampere
fYear :
2008
Firstpage :
1
Lastpage :
7
Abstract :
This paper studies the impact of various simulation and network-on-chip (NoC) setups in common load-latency curves that are used for performance evaluation. The different setups yield very large variation in the observed performance yet they are too often undocumented. Vague definitions make the comparison of NoCs hard or impossible since the large uncertainties hide the actual differences between compared networks. Hence, this paper presents guidelines for performing load-latency measurements for network-on-chips to avoid these pitfalls.
Keywords :
network-on-chip; load-latency curves; load-latency measurement; network-on-chips; performance evaluation; Benchmark testing; Delay; Guidelines; Network interfaces; Network topology; Network-on-a-chip; Payloads; Routing; Telecommunication traffic; Traffic control; benchmarking; latency; network-on-chip; performance analysis;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
System-on-Chip, 2008. SOC 2008. International Symposium on
Conference_Location :
Tampere
Print_ISBN :
978-1-4244-2541-9
Electronic_ISBN :
978-1-4244-2542-6
Type :
conf
DOI :
10.1109/ISSOC.2008.4694860
Filename :
4694860
Link To Document :
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