Title :
An ASIC-design-based configurable SOC architecture for networked media
Author :
Ma, Ning ; Pang, Zhibo ; Tenhunen, Hannu ; Zheng, Li-Rong
Author_Institution :
Sch. of Inf. & Commun. Technol., R. Inst. of Technol. (KTH), Stockholm
Abstract :
An ASIC-design-based configurable SOC architecture, which is high performance, flexible, programmable, and compiler-independent, is designed for networked media applications. A coarse-grained parallel computing mechanism is employed in this architecture. Mapping this architecture to a specific application is demonstrated through an example in multimedia application. The design is validated in a powerful FPGA, consisting of two CPUs, working at 81 MHz and five function units, working at 40.5 MHz.
Keywords :
parallel processing; system-on-chip; ASIC-design-based configurable SOC architecture; coarse-grained parallel computing; frequency 40.5 MHz; frequency 81 MHz; multimedia application; networked media; Application specific integrated circuits; Central Processing Unit; Computer architecture; Costs; Data processing; Digital signal processing; Field programmable gate arrays; Hardware; Parallel processing; Silicon;
Conference_Titel :
System-on-Chip, 2008. SOC 2008. International Symposium on
Conference_Location :
Tampere
Print_ISBN :
978-1-4244-2541-9
Electronic_ISBN :
978-1-4244-2542-6
DOI :
10.1109/ISSOC.2008.4694877
