DocumentCode :
1623977
Title :
Balancing the 3D pipeline in the mainstream PC
Author :
Eggebrecht, Lewis C.
Author_Institution :
Multimedia PC Group, Philips Semicond., Sunnyvale, CA, USA
fYear :
1997
Firstpage :
300
Lastpage :
306
Abstract :
This paper reviews several issues related to designing a well balanced 3D PC system. Where and how the 3D pipeline is partitioned between acceleration hardware and PC processor software, can dramatically effect the cost and performance of a PC 3D implementation. Selection of bus interfaces and how they are used further influences the partitioning of the pipeline between the host CPU and the 3D hardware. Memory architecture and bandwidth, as well as the 3D quality levels desired, also must be considered to optimize the design´s efficiency
Keywords :
computer graphic equipment; costing; logic design; memory architecture; microcomputers; performance evaluation; system buses; 3D PC system design; 3D hardware; 3D pipeline balancing; 3D quality levels; PC processor software; acceleration hardware; bandwidth; bus interfaces; cost; host CPU; mainstream personal computer; memory architecture; performance; pipeline partitioning; Acceleration; Bandwidth; Costs; Design optimization; Geometry; Graphics; Hardware; Memory architecture; Pipelines; Software performance;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Wescon/97. Conference Proceedings
Conference_Location :
Santa Clara, CA
ISSN :
1095-791X
Print_ISBN :
0-7803-4303-4
Type :
conf
DOI :
10.1109/WESCON.1997.632352
Filename :
632352
Link To Document :
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