DocumentCode :
1624024
Title :
Ultra-high density floating gate devices using self-assembled 2D arrays of gold nanoparticles
Author :
Muralidharan, Girish ; Santhanam, Venugopal ; Bhat, Nagaraj
Author_Institution :
Dept. of Chem. Eng., Indian Inst. of Sci., Bangalore, India
fYear :
2012
Firstpage :
1
Lastpage :
4
Abstract :
We present a method for fabricating ultrahigh density floating gate devices using highly ordered 2D arrays of gold nanoparticles (8×1011 particles/cm2) as the charge storage nodes. The removal of polystyrene ligands, after array formation, was essential for obtaining reliable memory window. Surprisingly, the memory window of devices using arrays with 4 nm spacing was found to be larger than that of devices using arrays with 2 nm spacings.
Keywords :
MOS capacitors; gold; nanofabrication; random-access storage; self-assembly; Au; MOS capacitor; charge storage nodes; gold nanoparticles; polystyrene ligand removal; reliable memory window; self-assembled 2D arrays; ultrahigh density floating gate devices; Atmospheric measurements; Integrated circuits; Magnetic field measurement; Magnetic resonance imaging; Magnetic tunneling; Particle measurements; Plasma measurements; Gold nanoparticle array; MOS capacitor; floating gate memory; ligand removal;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Emerging Electronics (ICEE), 2012 International Conference on
Conference_Location :
Mumbai
Print_ISBN :
978-1-4673-3135-7
Type :
conf
DOI :
10.1109/ICEmElec.2012.6636241
Filename :
6636241
Link To Document :
بازگشت