DocumentCode
1624361
Title
A comparison of adiabatic logic as a countermeasures against power analysis attacks
Author
Takahashi, Yasuhiro ; Sekine, Toshikazu ; Yokoyama, Michio
Author_Institution
Dept. of Electr. & Electron. Eng., Gifu Univ., Gifu, Japan
fYear
2010
Firstpage
615
Lastpage
618
Abstract
This paper investigates the possibility of using adiabatic logic as a countermeasure against power analysis attacks. As the examples of adiabatic logic styles, we evaluate single- and dual-rail gates that are driven a single sinusoidal power clock. From simulation results, we conclude that adiabatic logic countermeasures, such as the single-rail logics, seem to be promising candidates, because they increase the resistance against power analysis attacks while at the same time lowering the power consumption of the pervasive device.
Keywords
CMOS logic circuits; cryptography; logic gates; power aware computing; adiabatic logic countermeasure; dual-rail gate; pervasive device; power analysis attacks; power consumption; single sinusoidal power clock; single-rail gate; single-rail logics; Clocks; Cryptography; Switches; adiabatic logic; low power; power analysis attacks;
fLanguage
English
Publisher
ieee
Conference_Titel
System Science and Engineering (ICSSE), 2010 International Conference on
Conference_Location
Taipei
Print_ISBN
978-1-4244-6472-2
Type
conf
DOI
10.1109/ICSSE.2010.5551783
Filename
5551783
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