DocumentCode
1625893
Title
A method for hunting bugs that occur due to system conflicts
Author
Geist, Daniel ; Vaida, Oded
Author_Institution
Intel Israel, Haifa
fYear
2008
Firstpage
11
Lastpage
17
Abstract
A very important class of bugs that occurs in VLSI projects, and especially in System on Chip (SoC) type projects, are bugs caused by two or more processes on chip trying to access a shared resource simultaneously. These kinds of bugs are both hard to find and very likely have the potential to cause a respin if not found since it is very hard to work around them in software (SW). In this paper we present a framework to define such conflict cases and a tool for automatically generating test cases from this definition. We have implemented this framework and tool, generated test suites, and simulated them on the Design Under Verification. Our method immediately proved its effectiveness by catching an unknown problem in a project which has already established a reasonable test suite regression that is simulated periodically.
Keywords
VLSI; automatic test pattern generation; logic design; logic testing; program debugging; resource allocation; system-on-chip; VLSI project; bug hunting; design under verification; resource sharing; system conflict; system on chip; test case; Automatic testing; Computer bugs; Costs; Degradation; System-on-a-chip; Terminology; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
High Level Design Validation and Test Workshop, 2008. HLDVT '08. IEEE International
Conference_Location
Incline Village, NV
ISSN
1552-6674
Print_ISBN
978-1-4244-2922-6
Type
conf
DOI
10.1109/HLDVT.2008.4695866
Filename
4695866
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