DocumentCode
1626228
Title
Functional testing approaches for “BIFST-able” tlm_fifo
Author
Alemzadeh, H. ; Navabi, Z. ; Di Carlo, S. ; Scionti, A. ; Prinetto, P.
Author_Institution
Dept. of Electr. & Comput. Eng., Univ. of Tehran, Tehran
fYear
2008
Firstpage
85
Lastpage
92
Abstract
Evolution of Electronic System Level design methodologies, allows a wider use of Transaction-Level Modeling (TLM). TLM is a high-level approach to modeling digital systems that emphasizes on separating communications among modules from the details of functional units. This paper explores different functional testing approaches for the implementation of Built-in Functional Self Test facilities in the TLM primitive channel tlm_fifo. In particular, it focuses on three different test approaches based on a finite state machine model of tlm_fifo, functional fault models, and march tests respectively.
Keywords
design for testability; electronic equipment testing; memory architecture; electronic system evolution; finite state machine; functional testing; transaction-level modeling; Automatic testing; Communication channels; Design for testability; Design methodology; Digital systems; Hardware; Software testing; System testing; System-level design; Test facilities; Design for Testability (DFT); Functional Testing; System Level Design; System Test; Transaction Level Modeling (TLM);
fLanguage
English
Publisher
ieee
Conference_Titel
High Level Design Validation and Test Workshop, 2008. HLDVT '08. IEEE International
Conference_Location
Incline Village, NV
ISSN
1552-6674
Print_ISBN
978-1-4244-2922-6
Type
conf
DOI
10.1109/HLDVT.2008.4695882
Filename
4695882
Link To Document