Evaluation of the Safe Operating Area of a 2.0 CM2, 4 kV Si SGTO

Summary form only given. The U. S. Army Research Laboratory (ARL) has been evaluating high voltage, high current modular silicon super-GTOs (SGTOs) developed by Silicon Power Corporation (SPCO) for ARL. The modular approach, combining SGTO die in parallel and in series, has been successful for devices implemented in both 10 kV, 80 kA and 10 kV, 400 kA configurations. It is desirable to fully characterize the SGTOs at the individual chip level, though, in order to fully understand the capabilities of any scaled up device packages. To supply this study, SPCO modules containing eight Si die were altered so that each device could be switched independently while the other seven remained unused. Each SGTO was switched up to the point of destruction, which was evident in damage to the device´s gate or to its anode-to-cathode high voltage blocking. SGTOs were pulsed in two separate test beds: one designed to produce narrow current pulses, and another designed for wider pulses approaching 1 ms. Peak current, rise time and action (I²t) limitations were evaluated across this spectrum of pulse widths to document the safe operating area (SOA) of the Si SGTOs. The peak current attained at a 2mus FWHM pulse width was 20 kA with a 10-90% rate-of-current rise time of 26 kA/mus. In the wider pulse circuit, single die were switched as high as 6.2 kA with an action value of 18 times 10³ A²s. Waveforms for various SGTOs were analyzed, and a set of SOA curves was created to represent characterization of the SGTO die.