• DocumentCode
    1626443
  • Title

    Special session - What’s so intelligent about testbenches?

  • Author

    Ziv, Avi ; Wilson, Chris ; Hamid, Adnan ; Grosse, Joerg

  • Author_Institution
    IBM, USA
  • fYear
    2008
  • Firstpage
    141
  • Lastpage
    142
  • Abstract
    Functional verification is one of the main bottlenecks of the hardware design process and its complexity and demands are growing in an even faster pace than design complexity. Many technologies and methodologies that improve the quality of the verification process and the productivity of the verification team have been developed and successfully deployed throughout the years. Random stimuli generation is certainly one of the main advances in the field of functional verification. The shift from manually created test cases to machine generated stimuli helped automating many aspects of the verification process, replacing expensive and scarce human experts with readily available compute power.
  • Keywords
    Automatic testing; Computer bugs; Design engineering; Hardware design languages; Power generation; Process design; Productivity; Random variables; System testing; Writing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    High Level Design Validation and Test Workshop, 2008. HLDVT '08. IEEE International
  • Conference_Location
    Incline Village, NV, USA
  • ISSN
    1552-6674
  • Print_ISBN
    978-1-4244-2922-6
  • Type

    conf

  • DOI
    10.1109/HLDVT.2008.4695892
  • Filename
    4695892