A linearized CMOS Quad using selective even feedback

A CMOS Quad containing two asymmetric differential-pairs when driven by a differential input-voltage generates two output-currents: one that is approximately proportional to the input-voltage, and the other, to the square of the input-voltage. We present a simple circuit modification that feeds back the square-law current to linearize the Quad and hence reducing distortion. Also this feedback enables us to take differential output current without demanding high common mode rejection ratio from the next stage. Analytical results based on the simple square-law model for the FETs are presented. Simulation results obtained from large-signal analysis using 0.18 mum TSMC BSIM3 models show that the total harmonic distortion is below 0.25% for a 1 KHz sinusoidal input. Distortion remains low up to a frequency of 1 GHz.