DocumentCode :
1627832
Title :
Design of a high linearity low noise mixer for low voltage application
Author :
Hu, Song ; Li, Weinan ; Huang, Yumei ; Hong, Zhiliang
Author_Institution :
State Key Lab. of ASIC & Syst., Fudan Univ., Shanghai, China
fYear :
2010
Firstpage :
653
Lastpage :
655
Abstract :
A 1.2V Gilbert mixer with improved linearity and noise figure is presented. To improve the linearity, an optimum gate bias is applied to the transconductance stage, and a series LC network resonating around 2fLO is implemented at the common source nodes of the switch quad. Analysis shows that the flicker noise performance also benefits from the series resonating network. The 2.1GHz mixer fabricated with 0.13μm CMOS technology is demonstrated. Linearity measurement from two tone tests shows that the IMD3 is improved over a wide range of the input power level. Compared with the conventional Gilbert mixer, the IMD3 is improved by 13.1dB and the DSB noise figure measured at 1MHz intermediate frequency is improved by 3.7dB. The mixer consumes 3.5mA current from a 1.2V supply voltage.
Keywords :
CMOS integrated circuits; mixers (circuits); CMOS technology; Gilbert mixer; current 3.5 mA; flicker noise performance; frequency 1 MHz; frequency 2.1 GHz; high linearity low noise mixer; intermediate frequency; linearity measurement; low voltage application; noise figure; optimum gate bias; series LC network; series resonating network; switch quad; transconductance stage; voltage 1.2 V; 1f noise; Harmonic analysis; Linearity; Mixers; Noise figure; Switches; Transconductance;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State and Integrated Circuit Technology (ICSICT), 2010 10th IEEE International Conference on
Conference_Location :
Shanghai
Print_ISBN :
978-1-4244-5797-7
Type :
conf
DOI :
10.1109/ICSICT.2010.5667292
Filename :
5667292
Link To Document :
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