DocumentCode
162799
Title
Minimum energy operation using robust asynchronous logic with sleep transistors
Author
Sridharan, Arun ; Sechen, Carl
Author_Institution
Dept. of Electr. Eng., Univ. of Texas at Dallas, Richardson, TX, USA
fYear
2014
fDate
12-13 Oct. 2014
Firstpage
1
Lastpage
5
Abstract
We demonstrate minimum energy operation using a robust approach to asynchronous logic design combined with the use of sleep transistors. The combined approach yields extremely low power and energy for a system operating in the subthreshold regime. This enables operation at voltages below those associated with the previously proposed minimum energy operating point (MEP) and therefore appreciably reduces the energy consumption compared to MEP. We also demonstrate that the robustness of our asynchronous system under Monte Carlo variations can actually yield significant additional power savings compared to a synchronous design.
Keywords
Monte Carlo methods; asynchronous circuits; logic design; transistor circuits; MEP; Monte Carlo variations; asynchronous logic design; energy consumption; minimum energy operating point; robust asynchronous logic; sleep transistors; Delays; Performance evaluation; Power supplies; Robustness; Switching circuits; Throughput; Transistors; dynamic energy; leakage energy; low power; minimum energy point; sleep asynchronous design; subthreshold;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems Conference (DCAS), 2014 IEEE Dallas
Conference_Location
Richardson, TX
Type
conf
DOI
10.1109/DCAS.2014.6965334
Filename
6965334
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