An optimized low swing CMOS driver-receiver for on-chip interconnects

Author

Fallah, Mina ; Abrishamifar, Adib

Author_Institution

Dept. of Electron., Islamic Azad Univ. of Qazvin, Qazvin, Iran

fYear

2010

Firstpage

560

Lastpage

562

Abstract

In this paper a low swing driver-receiver pair (lhos-lp) for driving signals is proposed to optimize the energy dissipation and delay of global interconnect lines. The simulation, performed based on 1V 0.13μm CMOS technology with HSPICE, for signal transmission along a wire- length of 10 mm. The simulation results show lhos-lp is 18% and 14% better than other similar signaling schemes (lhos-db and lhos-lhos) and consumes 17% lower energy than lhos-lhos and it has similar energy consumption respect to lhos-lp. Also this circuit performs 28% and 20% better than lhos-lhos and lhos-db in a point of energy delay product.

Keywords

CMOS integrated circuits; driver circuits; integrated circuit design; integrated circuit interconnections; HSPICE; energy delay product; energy dissipation; global interconnect lines; low swing CMOS driver-receiver; on-chip interconnects; signal transmission; size 0.13 mum; voltage 1 V; Delay; Energy dissipation; Integrated circuit interconnections; Integrated circuit modeling; Receivers; Transistors; Wire;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State and Integrated Circuit Technology (ICSICT), 2010 10th IEEE International Conference on

Conference_Location

Shanghai

Print_ISBN

978-1-4244-5797-7

Type

conf

DOI

10.1109/ICSICT.2010.5667335

Filename

5667335