Bit-stream control system: Stability and experimental application

This paper proposes a novel approach to controller implementations based on bitstream signal processing. A stability condition is derived analytically based on sliding mode analysis. Bit-stream techniques allows to the number of interface channels between the controller and other parts of the system to be reduced from multiple to single channel. Hence, significantly fewer hardware resources are consumed compared to those used in traditional multi-bit processing. Further, the complexity of the controller design is simplified by processing bitstream instead of multi-bit signals, as the innovative design of the controller is based on two-input multiplexers instead of multipliers. The effectiveness of the proposed bit-stream controller is illustrated experimentally by designing a bitstream PID controller to control the position of a DC motor. Various functional blocks are built to implement Proportional, Integral and Derivative actions in a bitstream environment. Experimental results from a laboratory prototype illustrate that the bitstream-based PID controller yields an identical performance to the discrete-time PID, effectively controlling the position while consuming an approximate 255 logic cells (LC) and 73 registers on an Altera Cyclone FPGA, compared to the 688 (LC) and 96 registers consumed by the 16-bits word-length discrete-time PID controller.